The present invention relates to semiconductor memory devices, for example, to a specifically effective technique to be available for on chip type multi-port memories etc. which are used as time switches of time sharing digital exchangers.
There is a multi-port memory having one or a plurality of write ports and read ports. Also, there is a time sharing digital exchanger using such a multi-port memory as a time switch. Further, as one means intended for low consumption power of a multi-port memory, there is so-called single memory cell selection system where memory cells constituting memory arrays are made selection states alternatively according to row and column selection signals.
A multi-port memory cell in single memory cell selection system is disclosed, for example, in Japanese patent application laid-open No. 34726/1979.